Taming Heterogeneity in HPC - The DEEP and DEEP-ER take on Heterogeneous Cluster Architectures

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Presented at SAIcompconf 2016 by

Head of Cluster Computing at Jülich Supercomputing Centre Norbert Eicker is Professor for Parallel Hardware and Software Systems at Bergische Universität Wuppertal and head of the research group Cluster Computing at Jülich Supercomputing Centre. Before joining JSC in 2004, Norbert was with ParTec from 2001 on working on the Cluster Middleware ParaStation. During his career he was involved in several research and development projects including the ALiCE-cluster in Wuppertal, JULI and JSC's general purpose supercomputer JuRoPA. Currently he is acting as the chief architect for the DEEP and DEEP-ER projects. Norbert holds a PhD in Theoretical Particle Physics from Wuppertal University. Abstract: Simulations play an ever increasing role in science and engineering. While many requirements might be fulfilled by standard machines there are always grand challenges demanding for more specialized high-performance computers. For this today's most powerful systems provide a performance of a few dozens PetaFlops, i.e. 10^15 floating point operations per second. The next big challenge in developing high-performance computing (HPC) system is Exascale, i.e. 10^18 floating point operations per second expected at the beginning of the next decade. During the last decade HPC was dominated by homogeneous cluster computers build from standard server machines interconnected by high-speed networks like InfiniBand. Nevertheless, it seems to be conceivable that multi-core processors will not be able to satisfy the requirements on density and energy-efficiency anticipated for Exascale. Therefore, heterogeneity is also explored in HPC by introducing accelerator components into each cluster node like GPGPUs or Intel Xeon Phi co-processor cards. On the way to explore the path to Exascale, the DEEP/-ER projects take a radically different approach on heterogeneity. Instead of combining different computing elements within single nodes DEEP/-ER's Cluster-Booster concept integrates multi-core processors in a standard Cluster while combining many-core processors in a separate cluster of accelerators, the so-called Booster. For this, DEEP's Booster consists solely of Intel Xeon Phi processors interconnected by the EXTOLL network. The talk will not only share insights on the challenges of the hardware integration in a most energy efficient way but also discuss the strong requirements the architecture poses on the corresponding programming model. While it turns out that MPI provides all the low-level semantics required to utilize the Cluster-Booster system, the project uses an OmpSs abstraction layer in order to support software developers to adapt their applications to the heterogeneous hardware. The ultimate goal is to reduce the burden on the application developers. To this end DEEP/-ER provides a well-accustomed programming environment that saves application developers from some of the tedious and often costly code modernization work. Confining this work to code-annotation as proposed by DEEP/-ER is a major advancement.