Physical Security Protection Based on Non-deterministic Configuration of Integrated Microelectronic Security Features

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Presented at ICMC 2013 by

Tamas Visegrady

Cryptographic modules integrating tamper-reactive circuitry face serious challenges when sensitive internal regions need to be physically protected by chip-integrated or board-embedded tamper-responsive meshes. While integrated paths may be manufactured with very high resolution, their manufacturing variation is considerably lower than their discrete counterparts, such as conductive traces embedded within layers of foil. Even if physical probes do not have the resolution of state-of-the-art microelectronics, the regularity and predictability of highly deterministic structures limits their efficiency, if they need to form a barrier against physical intrusion. This presentation describes an integrated tamper-detection system which combines prefabricated, tamper-sensitive surfaces in three dimensions with a configurable connection network. It will also show how 3D simulation software, specifically raytracing, is used to approximate sensitivity of the configured mesh. In addition to evaluating the sensitivity of specific combinations, 3D simulation may also establish bounds on the protection properties of the raw mesh, such as width and orientation of possible paths not intersecting any of the prefabricated structures.